1. Field of Invention
The present invention relates to a driving circuit for an electrooptical device in which the driving circuit performs high definition display while preventing an unnecessary region from being generated in a formation region, to the electrooptical device including the driving circuit, and to an electronic apparatus using the electrooptical device.
2. Description of Related Art
A driving circuit for a conventional electrooptical device, for example, a liquid crystal device, includes a data-line driving circuit, a scanning-line driving circuit, and a sampling circuit that supply video signals, scanning signals, etc., with predetermined timing, to data lines, scanning lines, etc., provided in an image display region. Among the circuits, the data-line driving circuit includes, in general, a plurality of latch circuits (shift-register circuit), and outputs sampling-control signals by sequentially shifting transfer signals supplied in the beginning of a horizontal scanning period in accordance with a clock signal. The scanning-line driving circuit similarly includes a plurality of latch circuits, and outputs a scanning signal by sequentially shifting transfer signals supplied in the beginning of a vertical scanning period in accordance with a clock signal. The sampling circuit, which includes sampling switches provided corresponding to the data lines, samples externally supplied video signals in accordance with sampling-control signals, and supplies the sampled signals to the data lines.
Also, a construction is employed that provides buffer circuits between latch circuits and a sampling circuit so that transfer signals are processed by wave shaping to generate the sampling-control signals and that can sufficiently cope with a load on the sampling switches, even if the driving ability of the latch circuits is insufficient for driving sampling switches.
In addition, an electrooptical device with built-in driving circuits has been developed in which the above-described driving circuits are provided on a substrate included in the electrooptical device. In this type of electrooptical device, devices constituting the driving circuits are fabricated in a common process, with switching devices, in view of, for example, increasing the efficiency of the fabrication process. For example, in a liquid crystal device using liquid crystal as an electrooptical material, devices constituting driving circuits include thin-film transistors (hereinafter referred to as xe2x80x9cTFTsxe2x80x9d) which drive liquid crystal pixels. This type of electrooptical device with built-in driving circuits are advantageous in achieving a reduction in the overall size and cost reduction, compared with a type of electrooptical device in which driving circuits, formed on a separate substrate, are externally provided.
Recently, not only in electrooptical devices but also in display units in general, high definitions, such as XGA (1024xc3x97768 dots), SXGA (1280xc3x971024 dots), and UXGA (1600xc3x971200 dots) standards, are in great demand. In accordance with the demand, it is required that a dot frequency in an electrooptical device be increased. When the dot frequency is increased in the type of electrooptical device with built-in driving circuits, insufficiency in the sampling performance of sampling switches, delays in the operations of devices constituting the driving circuit, etc., occur, so that, by way of example, as a result of writing, video signals that must originally be written in the next data line, as well as in the previous data line, a so-called xe2x80x9cghostxe2x80x9d or xe2x80x9ccrosstalkxe2x80x9d is generated, reducing the definition of a displayed image. As a solution, the performance itself of the sampling switches and devices constituting the driving circuits can be enhanced, but this results in a remarkable increase in the cost.
Accordingly, a technique has recently been developed in which video signals on a route are distributed to a plurality of routes while being expanded (serial-to-parallel converted) in a time domain and in which a sampling circuit simultaneously samples video signals on a plurality of routes and simultaneously supplies the sampled signals to a plurality of data lines. According to this technique, in accordance with the number of data lines being simultaneously driven, the sampling time of each sampling switch is multiplied by the number of data lines being simultaneously driven. Thus, a driving frequency in a driving circuit decreases substantially with the reciprocal of the number of data lines being simultaneously driven. Therefore, it is possible to cope with an increased dot frequency without improving the performance of the sampling switches, devices constituting driving circuits, devices for driving pixels, etc.
In the case where a plurality of data lines are simultaneously driven as described above, it is required that a plurality of sampling switches be supplied with sampling-control signals at the same time or of the same type. Accordingly, it is required that the driving ability of buffer circuits provided between latch circuits and the sampling switches be enhanced in accordance with a total load on the sampling switches.
Concerning measures for enhancing the driving ability of the-buffer circuit, it is possible that logic circuits constituting the buffer circuit, for example, devices constituting an inverter, be enlarged in size. In the measures, simple enlargement of the component devices generates the need for enhancing the driving ability of the latch circuit, causing a result which contradicts a general demand in the technical field of the electrooptical device, such as reduction in power consumption of the shift-register circuit including a plurality of latch circuits. Accordingly, a construction is employed in which a buffer circuit is formed by connecting a plurality of inverters in series so as to have a plurality of stages, whereby the driving ability of the buffer circuit is enhanced step-by-step in each stage. In other words, a construction is employed in which the size of devices constituting inverters in stages on the side of the latch circuits is small and in which the size of devices constituting inverters on the side of the sampling switches is large.
If each buffer circuit including inverters connected in series so as to have a plurality of stages is provided in the above-described electrooptical device with built-in driving circuits, each buffer circuit is enlarged in a substrate region, so that a problem occurs in that an area occupied by each buffer circuit and an ineffectively used area increase. In particular, since a region in which the buffer circuits are formed is normally a region provided between video-signal lines and a shift-register circuit, it is longitudinal in a direction intersecting with a direction in which data lines extend. Accordingly, in a simple construction in which inverters in each stage are formed from devices longitudinally extending along the direction in which data lines extend and in which the inverters are connected in series so as to have a plurality of stages, the proportion of an ineffectively used area of the region is remarkably large. Finally, a data-line driving circuit is formed in an outermost part of an image-display region. Thus, a non-image-display region expands, causing a result contradicting general demands on the electrooptical device, such as size and weight reduction of the entire electrooptical device, and enlargement of an image display region in the same device size.
The present invention provides a driving circuit for an electrooptical device including the driver circuit, such as a liquid crystal device simultaneously driving a plurality of data lines in which the driving circuit efficiently uses a substrate region to enable reduction in the size of the entire electrooptical device, an electrooptical device including the driving circuit, and an electronic apparatus including the electrooptical device.
To achieve the foregoing, the present invention provides a driving circuit for an electrooptical device including, on a substrate, a plurality of scanning lines, a plurality of data lines, switching devices connected to the scanning lines and the data lines, and pixel electrodes connected to the switching devices. The driving circuit may include on the substrate, a shift-register circuit including a plurality of latch circuits for sequentially outputting transfer signals, buffer circuits provided corresponding to output stages of the shift-register circuit with each consisting of two or more logic circuits connected in parallel along a direction intersecting a direction in which the data lines extend and outputting the transfer signals as sampling-control signals, and sampling switches connected to the data lines provided for sampling video signals in accordance with the sampling-control signals and for supplying the sampled signals to the corresponding data lines, among which a plurality of sampling switches connected to a plurality of adjacent data lines are simultaneously driven.
According to the present invention, sampling-control signals are simultaneously supplied to p sampling switches connected to a plurality of (here described as xe2x80x9cpxe2x80x9d for convenience) adjacent data lines. At this time, transfer signals are sequentially output by a shift-register circuit, and the transfer signals are output as the sampling-control signals via buffer circuits. Video signals are sampled in accordance with the sampling-control signals by the sampling switches, and the sampled signals are supplied to the p data lines. Since the p sampling switches are simultaneously driven as described above, the driving of the data lines is facilitated, even for video signals having a high dot frequency.
The sampling-control signals are supplied corresponding to each group of p sampling switches. Thus, each buffer circuit may be provided for each latch circuit in the shift-register circuit, not with the pitch of the data lines but with a pitch p times the pitch of the data lines. Accordingly, in a region in which buffer circuits are formed, length in a direction intersecting the data lines is sufficiently reserved, compared with a conventional method of driving the sampling switches one by one. Since two or more logic circuits constituting the buffer circuits are connected in parallel in the direction intersecting the data lines, efficient use of the substrate region and an increase in the driving ability are achieved. The logic circuits each in the present invention include not only a single circuit, such as an inverter, a buffer, or a NAND gate, but also a circuit obtained by combining two or more single circuits as described.
In the present invention, it is preferable that transistors constituting the logic circuits have a width direction formed in a direction in which the data lines extend. The driving ability of a buffer circuit is, in general, determined by the size of a transistor constituting the buffer circuit, particularly by channel width. However, in the present invention, a transistor is formed so that the channel width direction of the transistor is the direction in which the data lines extend. Thus, relatively easy reservation of necessary channel width can be performed.
In this construction, it is preferable that, among two or more logic circuits connected in parallel, adjacent logic circuits share one of a plurality of power-supply wires. This is because this arrangement efficiently uses the substrate region in connection with sharing. Concerning the sharing of one of a plurality of power-supply wires, the arrangement can easily be formed by disposing adjacent logic circuits so as to be symmetrical around the shared power-supply wire. This is effective particularly in the case where a logic circuit comprises a complementary transistor, as described below.
In the present invention, in the region where the buffer circuits are formed, length in the direction intersecting the data lines is sufficiently reserved, compared with the conventional method of driving the sampling switches one by one. However, the length is determined by almost only the number p of the sampling switches simultaneously driven. The number of logic circuits connectable in parallel in a stage cannot be increased without limitation. Accordingly, in the present invention, it is preferable that the buffer circuits be formed by connecting in series two or more logic circuits connected in parallel so as to have a plurality of stages in the direction in which the data lines extend. With this construction, the driving ability of the buffer circuits can be enhanced, achieving efficient use of the substrate region.
In addition, in this condition, it is preferable that the channel width of transistors constituting logic circuits in one stage be broader than the channel width of transistors constituting logic circuits in the previous stage. With this construction, the driving ability of the entire buffer circuits can be enhanced since the sizes of transistors constituting the logic circuits increase step by step corresponding to stages. Accordingly, the number of samplings that can be simultaneously driven can be increased. Since transistors that constitute logic circuits in the first stage may have a relatively small size, latch circuits for supplying the transistors with transfer signals may have driving ability. Therefore, for a shift-register circuit including a plurality of latch circuits, its circuit size is reduced and reduced power consumption is achieved.
As the number of stages connected in series increases, a total of delay periods caused by transistors constituting the logic circuits increases. Accordingly, it is actually preferable that the number of stages connected in series be determined so that the total of delay periods finally affects a displayed image and so that a dot frequency, necessary specifications, image definition, etc., are comprehensively considered.
In the arrangement connected in series, it is preferable that the numbers of logic circuits connected in parallel in all the stages be equal. With this arrangement, the logic circuits are arranged in the form of a matrix in the direction in which the data lines extend, so that designing in the buffer circuits is facilitated. By connecting, in parallel, logic circuits to the limit in each stage in the direction intersecting the direction in which the data lines extend, the substrate region can be used to the limit.
In an arrangement in which logic circuits are arranged in the form of a matrix, it is preferable that, among the logic circuits in all the stages, logic circuits in the same stage mutually share power-supply wires formed in the direction in which the data lines extend. With this construction, not only the design of the buffer circuits is facilitated but also the substrate region is effectively used in connection with the shared power-supply wires. In order that a power-supply wire is shared by logic circuits positioned in the same stage, two power-supply wires can be disposed so as to be opposed to each other in the form of comb teeth. In particular, in this arrangement, among logic circuits in the same row, one of a plurality of power-supply wires is shared by adjacent logic circuits, which greatly simplifies the wiring of power-supply wires.
It is preferable that each logic circuit in the driving circuit according to the present invention comprises a complementary transistor. This can increase the input impedance of each logic circuit using the complementary transistor, and can drive each high-loaded sampling switch via the complementary transistor, based on transfer signals from each latch circuit having small driving ability.
It is preferable that the driving circuit according to the present invention further comprises a phase-adjusting circuit which restricts the signal width of the transfer signal from each latch circuit to a predetermined period and which supplies the restricted signal to each buffer circuit. Thereby, the phase-adjusting circuit restricts the signal width (time in which the signal is at an active level) of each transfer signal to a predetermined period, whereby overlapping of transfer signals closely output from the latch circuits is reduced. This prevents the simultaneous sampling of the same video signals in data lines that must be driven by different sampling-control signals, whereby the generation of crosstalk and ghosts is suppressed beforehand.
In the driving circuit according to the present invention, it is preferable that, on the substrate, a plurality of video-signal lines for supplying the video signals are arranged along the scanning lines, and that the buffer circuits be formed between the video-signal lines and the shift-register circuit. Thereby, the buffer circuits are formed in a region on the substrate between a plurality of video-signal lines and the shift-register circuit. Thus, the logic circuits are connected in parallel in a laterally long region along the video-signal lines and the scanning lines. As a result, efficient use of the substrate region and enhancement of driving ability are achieved.
In the driving circuit according to the present invention, it is preferable that the video signals be serial-to-parallel converted and supplied via the video-signal lines. Thereby, the video signals are converted onto a plurality of routes, which generates substantial clearance in the time domain. Thus, sampling switches having relatively low ability can be used, even for a high dot frequency.
To achieve the foregoing, the present invention provides an electrooptical device including the above-described driving circuit. According to the present invention, by achieving efficient use of the substrate enables size reduction in the entire device, a high-definition display, with enlargement of an image-display region in the same-sized device.
Here, it is preferable that the present invention include on the substrate, the pixel electrodes, which are arranged in the form of a matrix, and transistors provided between the pixel electrodes and the data lines that are switched on and off in accordance with scanning signals supplied to the scanning lines. This construction can electrically separate on-pixels and off-pixels by using transistors, whereby a high-definition and highly fine display having a high contrast and no crosstalk, is realized.
Moreover, to achieve the foregoing, the present invention provides an electric apparatus including the above-described electrooptical device, whereby a high-definition display having no ghosts and no crosstalk is realized.